Analog-to-digital (ADC) converters convert samples of an analog signal to a corresponding digital sequence, resulting in a digitally coded signal. ADC's that employ a resistor string couple intermediate taps at the resistor junctions, and possibly also at the resistor-power source junctions, to one input of comparators to generate a digital code corresponding to an analog signal captured by a sample-and-hold circuit and applied to another comparator input. The number of resistor string resistors, as well as the number of comparators, required to provide an n-bit converter is substantially 2.sup.n -1. It can be seen as the number of bits increase, the number of comparators and resistors increases more rapidly. When subranging is employed to achieve the conversion, various techniques exist to reduce the number of resistors in the resistor string, and also the number of comparators, from 2.sup.n -1 to some smaller number, depending upon the subranging technique employed and the division between number of most significant bits and number of least significant bits.
One technique employs a multi-step flash ADC. A flash converter is chosen for its speed of conversion in that a trade-off is made between speed and hardware required to accomplish the conversion. An analog signal from a sample-and-hold circuit is applied to one input of each comparator in a group of comparators while a reference voltage is applied to the resistor string. Taps from the resistor string are applied to the other input of each of the comparators in the group, and a number, M, of most significant bits of a digitally coded signal are determined. An analog signal corresponding to the digitally coded signal as represented by the M most significant bits is generated in a precision digital-to-analog converter. The analog output from the precision digital-to-analog converter, in one variation, is subtracted from the analog signal held by the sample and hold circuit, producing a residue. The residue is multiplied by a gain producing a gained residue which is applied to one input of each comparator in a group of comparators while taps from the resistor string are applied to the other input of each comparator to determine a number L of least significant bits. Another variation reduces the voltage range applied to the resistor string and reapplies the original sample-and-hold voltage to the comparator input.
This two-step (more generally multi-step) flash ADC technique has the shortcoming that between the flash steps determining the M most significant bits and the L least significant bits, are intermediate analog processes. The intermediate analog processes are serial, and each process requires some settling time. Allowing for the settling time increases the time to convert an analog sample to a corresponding digital code and thus limits the speed at which the conversion can be completed.
Another technique in subranging converters applies a reference voltage to a resistor string to determine M most significant bits using a resistor string with relatively large resistors. Subsequent to determining the M most significant bits, one of the resistors of the resistor string is removed from the resistor string and replaced with a resistor string segment of finer resistors. The reference voltage is reapplied to the resistor string and an adequate time period must be allowed to pass for the resistor string to settle. Subsequently, the L least significant bits are determined. In this technique, as in the technique above, allowing for the settling time increases the time to convert an analog sample to a corresponding digital code and thus limits the speed at which the conversion can be completed. It is noteworthy that the reference voltage need not be disconnected during replacement of a portion of the resistor string, but the settling time issue remains.
What is needed is a converter that overcomes the shortcomings of the prior art subranging ADC's to eliminate the intermediate analog processing steps, and thus the need for settling time, and thereby increase the speed at which analog-to-digital conversion can be completed.